1. Field of the Invention
The present invention relates to a double edge triggered flip-flop circuit.
2. Description of the Related Art
Various types of digital equipment, such as digital audio players, have been in widespread use, and the demand for LSIs (Large Scale Integration) used for digital signal processing is ever growing. On such LSIs, a great number of flip-flop circuits are mounted as fundamental elements of sequential circuits.
While energy conservation is being promoted, the reduction in power consumption of LSIs has been long called for. From the viewpoint of extending battery life, the reduction in power consumption is required for LSIs mounted on battery-powered equipment represented by mobile equipment.
20% to 45% of electric power consumed within the LSI is consumed as power for the charging and discharging of capacitances by clock signals. Thus, the reduction in power consumed by the charging and discharging will be effective in the reduction of power consumption of LSI. A double edge triggered flip-flop circuit is proposed as a means for reducing the power consumption due to the transition of clock signal.
A double edge triggered flip-flop circuit includes two latch circuits arranged in parallel with each other. One of the two latch circuits latches input data at rising edge of clock signal, whereas the other latch circuit latches the input data at falling edge of clock signal. The double edge triggered flip-flop circuit can achieve the same operation speed at a clock frequency half that used in a single edge triggered flip-flop. Since the clock frequency is halved, the power consumed by the clock signal can be reduced to a half.
A large number of transistors that turn on and off by the clock signal need to be provided in the double edge triggered flip-flop circuit. As a result, the power for the charging and discharging of capacitances by the clock signal increases. Also, a plurality of latch circuits need to be provided in the double edge triggered flip-flop circuit, thereby increasing the circuit area.